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Senior Design Verification Engineer

Senior Design Verification Engineer, Texas Instruments Finland Oy, Oulu

Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. By employing the world’s brightest minds, TI creates innovations that shape the future of technology. TI is helping about 100,000 customers transform the future, today. We’re committed to building a better future – from the responsible manufacturing of our semiconductors, to caring for our employees, to giving back inside our communities and developing great minds. Put your talent to work with us – change the world, love your job!

About the Job

Texas Instruments is seeking a Senior Design Verification Engineer. In this role you and your team will work on confirming the functionality and performance of analog and mixed signal integrated circuits during IC design phase. You will lead and perform study of the target specification for the device being developed to define a DV plan for the product. You and your team will then develop simulation test benches and automated checkers to verify design implementation and confirm top level functionality. Based on the simulations generated and completed, results will be reported out to the project team detailing progress in verifying functionality and any possible bugs that have been identified. In this role you will be interacting in a cross functional team to ensure bugs found are driven to complete closure. You will be leading a small DV team managing its work and employee development. In collaboration with other team leads and supervisors you help to define and improve the methodology of DV work and how DV team interfaces with other functions like systems and design engineering.

 Responsibilities

  • Plan and execute the pre-silicon verification of mixed-signal products yourself and with your team
  • Create verification plans using datasheets, inputs from engineers/customers, and working closely with systems engineers
  • Implement mixed-signal test-benches in Cadence Virtuoso and/or Verilog-AMS to apply stimulus and checks
  • Implement automatic checks and measurements to verify DUT behavior and populate a Spec Compliance Matrix (SCM)
  • Provide periodic updates on DV status to project participants, management, and customers
  • Work with design and systems teams to close bugs as they arise
  • Drive new and improved methodologies where needed, work with the EDA team to upgrade tools and flows
  • Review the digital and analog design to provide guidance on Design for Verification architecture and features

Minimum requirements:

  • Bachelor’s degree in electrical engineering
  • Minimum of 2 years of experience
  • Verilog and one of Verilog-A or Verilog-AMS or SystemVerilog or Specman
  • Creating behavioral models of analog circuits
  • Constrained-random stimulus and auto-checking verification environments
  • Bug tracking, functional coverage, RTL code coverage
  • Closed-loop simulation with digital design and analog behavioral models and/or transistors
  • Cadence Virtuoso schematic editor and ICFB tool environment
  • Project management, time management, multi-tasking, problem solving and communication (written and oral)

Our offer for you:

  • Benefit from a competitive salary, yearly profit sharing (dependent on company success) and many additional benefits and an unlimited contract from the beginning
  • Join an international work environment where your ideas count and where you can thrive in a diverse culture
  • Explore a world of opportunities for your personal and professional development

How to apply:

  • This position is open in expanding automotive power R&D team located in Oulu, Finland. For more information about the position, please contact Design Manager Mika Tarvainen, +358 40 849 6021, mika.tarvainen@ti.com
  • Apply now on careers.ti.com Job Code: 220009CN

Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment.

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